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Special Focus: Low-Power Design Methodology |
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Low-power design techniques become more and more crucial for all kinds of integrated digital circuits.
Traditionally, aggressive low-power measures have been applied to battery-operated applications only, but with increasing device performance, integration density and leakage current even designers of non-mobile applications face the challenge to minimize power consumption.
Besides spending more effort on traditional power-saving methods like clock-gating, more advanced methods come into play:
Retro-fitting these techniques into a design, is for the most part in-efficient if not impossible.
To achieve best leverage, low-power measures have to be considered at system specification stage.
A holistic approach, understanding the implications of low-power measures throughout all stages of the design, is key to win the power battle.
 Hober consulting, with it's expertise in both mobile and high-performance applications, ranging from multi-processor systems over wire-line telecommunication devices through wire-less chip-sets, from concept engineering through GDS2, is well prepared to consult and actively support customers in making the right choices to keep their designs inside the 'power-envelope'.
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